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Atm design using vhdl
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The objective of the project “ATM PACKET SWITCHING USING VHDL” is ,the ATM packet switching is used as switched fabric unit. depending on users requirement, the ATM packets are switched and is stored in SDRAM, from which ATM packets can be accessed by the other users. The ATM Packet switching using VHDL consist of UTOPIA level-3 interface, DUT(design under test) , sdram. UTOPIA level-3 acts as interface between the ATM layer and the physical device, it generates the ATM packets ,and sends to DUT. The DUT consist of three modules module-1 is, FIFO and DPRAM is used as memory. The module-2 is ROM and routing, the module-3 is SDRAM controllertor. The UTOPIA is a universal Test & operation PHY interface for ATM.ul3 of these packets are compared with rom content if any match is found then it is routed and stored in SDRAM.
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hi....i like to know more about this.. the designing, the algorithm....pls mail to my id ganga_147@yahoo.co.in
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please send me the synopsis of this project ill have to submit the synopsis on email id is-deepika.u@gmail.com

pls pls send this project report as soon as possible. 

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Hi,can u email me the details about this project?thanks

email: darkdevil87_36@msn.com 

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Please send me details of the project at "amit_ktll@yahoo.co.in"

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sir, please send me the report of this project...i&#;m intrested in doing this as my major project..plzzz..
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