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Atm design using vhdl
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The objective of the project “ATM PACKET SWITCHING USING VHDL” is ,the ATM packet switching is used as switched fabric unit. depending on users requirement, the ATM packets are switched and is stored in SDRAM, from which ATM packets can be accessed by the other users. The ATM Packet switching using VHDL consist of UTOPIA level-3 interface, DUT(design under test) , sdram. UTOPIA level-3 acts as interface between the ATM layer and the physical device, it generates the ATM packets ,and sends to DUT. The DUT consist of three modules module-1 is, FIFO and DPRAM is used as memory. The module-2 is ROM and routing, the module-3 is SDRAM controllertor. The UTOPIA is a universal Test & operation PHY interface for ATM.ul3 of these packets are compared with rom content if any match is found then it is routed and stored in SDRAM.
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hi 

i want to do this project for my final year

please send me the details with ckt dig

i am greatly thankful to you for this 

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i am studying VHDL, i need this project for my course kindly can u send this good one to me @ adnanghi@yahoo.com
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  • sir please send me this project details to my mail id; dilipkumar_486@yahoo.com
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pls send layout this project...

 

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